implemented access to registerbanks, fixed wrong write access

This commit is contained in:
hhaupt
2024-06-12 20:26:38 +02:00
parent 00c76166f8
commit a058b3f205
3 changed files with 146 additions and 69 deletions

View File

@ -28,6 +28,8 @@
#define PWR_MGMT0 0x1F
#define WHO_AM_I 0x75
#define INTF_CONFIG0 0x35
#define BLK_SEL_W 0x79
#define BLK_SEL_R 0x7C
#define MADDR_W 0x7A
@ -39,8 +41,9 @@
#define FIFO_COUNTL 0x3E
#define FIFO_DATA 0x3F
#define FIFO_CONFIG1 0x28
#define FIFO_CONFIG2 0x29
//MREG1
#define FIFO_CONFIG5 0x01
#define TMST_CONFIG1 0x00
#endif